IEEE International Workshop on
Impact of Low-Power design on Test and Reliability – LPonTR
Annual event, fringe to European Test Symposium
Official pages
Please visit the official pages of this workshop hosted by the ETS organisers
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IEEE LPonTR-2012:
- http://ets2012.imag.fr/fringe.php
Annecy, France, May 31 – June 1, 2012
Call For Papers
Technical Programme
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IEEE LPonTR-2011:
- http://www.iet.ntnu.no/workshop/ets2011/LPonTR.shtml
Trondheim, Norway, May 23-27, 2011
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LPonTR-2010:
- http://ets2010.felk.cvut.cz/lpontr-cfp-pdf.html
Prague, Czech Republic, May 27-28, 2010
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LPonTR-2009:
- http://www.imse.cnm.es/ets09/?act=workshop1
Seville, Spain, May 29, 2009
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LPonTR-2008:
- http://www.cad.polito.it/~ets08/LPonTR/LPonTR.html
Lago Maggiore, Italy, May 29, 2008
This workshop is held directly after the European Test Symposium
Aims
The IEEE International Workshop on Impact of Low Power Design on Test and Reliability (LPonTR) aims to bring together design, reliability and test
engineers and researchers to discuss the impact of advanced low-power low-voltage design methodologies of nanometer silicon systems on test and
reliability. Power and thermal issues, leakage, process variations, susceptibility to envi- ronmental and operation-induced interference drive the
development of low-power, process-tolerant design techniques and generate a new set of test and reliability challenges, questing for an innovative set of
methodologies and tools
Topics of Interest
The topics include, but not restricted to the following list:
- Energy-reliability tradeoff (inc. controlled losses) and its integration with power management
- Power and Thermal Issues in 3D ICs
- Challenges of Ultra Lowpower design on test and reliability
- Emerging failure modes
- Test of SoC with power and thermal management
- Energy, power and process variations aware design and test
- Test and reliability implications of leakage
- Low-power/voltage DfT, Dynamic BIST, Scan and ATPG
- Delay, statistical and parametric testing for LP circuits
- Signal integrity under test
- Test and reliability of LP redundant systems
- Analog, mixed-signal and asynchronous low-power design, test and DfT
- EDA tools to support process-tolerant LP design
Attraction of LPonTR
This workshop invites the authors to submit their work-in-progress in a form of a 2-page extended abstract. All submissions are reviewed by experts
from industry and academia. The accepted papers are published in the workshop proceedings and their authors are invited to present their work as a talk,
poster and/or a demonstration.
The workshop encourages feedback to the authors and networking. Selected submissions are invited for publication as full papers in the Journal of Low
Power Electronics (JOLPE).
For companies, this workshop gives an opportunity to expose themselves by giving a talk, participating in the panel discussion and/or demonstrating their
tools/products in a dedicated session. Please see the past technical programme for more details.
Please visit the links below and download the proceedings of LPonTR 2008–2012. The technical programmes of the past events show how densely the
workshop days are packed and indicate the overall value of the event.
LPonTR shares accommodation, catering and lunch facilities with the main ETS, which is known for its high standards. All communication including
submission of manuscripts is normally done by email. The workshop chairs will be happy to answer all queries.
On-line Proceedings, Call for Papers and other documents
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LPonTR’2012
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LPonTR’2011
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LPonTR’2010
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LPonTR’2009
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LPonTR’2008
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Chairs of LPonTR
Alex Bystrov(2008-2012), Newcastle University, Newcastle upon Tyne, U.K
Patrick Girard(2009-2012) LIRMM, Montpellier, France
Joao Paulo Cacho Teixeira(2008), IST, Technical Univ. Lisbon (TUL), INESC-ID Lisboa, Portugal
Technical Programme Committee
- Bashir Al-Hashimi, Univ. of Southampton, UK
- Karim Arabi, Qualcomm, USA
- Swarup Bhunia, Case Western Reserve Univ., USA
- Krish Chakrabarty, Duke Univ., USA
- Krishna Chakravadhanula, Cadence, USA
- Luigi Dilillo, LIRMM, France
- Peter Harrod, ARM Ltd, UK
- Mokhtar Hirech, Synopsys, USA
- Gert Jervan, Tallinn Univ., Estonia
- Niraj Jha, Princeton University, USA
- Mark Kassab, Mentor Graphics, USA
- Sandip Kundu, Univ. Massachusetts, USA
- Erik Larsson, Lund Univ., Sweden
- T.M. Mak, Intel, USA
- Hans Manhaeve, Q-Star, Belgium
- Nicola Nicolici, McMaster Univ., Canada
- Ilia Polian, Univ. of Passau, Germany
- Irith Pomeranz, Purdue Univ., USA
- Srivaths Ravi, TI, India
- Sudhakar Reddy, Univ. of Iowa, USA
- Juan Jose Rodriguez Andina, Univ. Vigo, Spain
- Ozgur Sinanoglu, Univ. NYUAD, Abu Dhabi
- Virendra Singh, Indian Institute of Science, India
- Mohammad Tehranipoor, Univ. Connecticut, US
- J. Paulo Teixeira, INESC-ID, Portugal
- Nur Touba, Univ. of Texas at Austin, USA
- Seongmoon Wang, NEC, USA
- Xiaoqing Wen, Kyushu Inst. of Technology, Japan
- Hans-Joachim Wunderlich, Univ. of Stuttgart, Germany
- Qiang Xu, The Chinese University of Hong Kong
LPonTR community
- Bashir Al-Hashimi, University of Southampton, UK
- David Atienza, Univ. of Madrid – Spain, EPFL – Switzerland
- Bernd Becker, Department of Computer Science University of Freiburg, Germany
- Paolo Bernardi, Politecnico di Torino, Italy
- Davide Bertozzi, Univ. of Ferrara, Italy
- Tobias Bjerregaard, Teklatech, Denmark
- Alberto Bosio, LIRMM – University of Montpellier, France
- Samir Boubezari, Atheros, Canada
- Alexander Bystrov, Newcastle University, UK
- Nick Cowern, Newcastle University, UK
- Giorgio Di Natale, LIRMM, France
- Luigi Dilillo, LIRMM / Univ. Montpellier
- James Docherty, Newcastle University, UK
- Stephan Eggersgluss, University of Bremen, Germany
- Santiago Fernandez-Gomez, Physical Design Manager, Apple Inc., USA
- Joan Figueras, University Barcelona, Spain
- Judit Freijedo, Universidad de Vigo – Departamento de Tecnologia Electronica, Spain
- Patrick Girard, LIRMM, Montpellier, France
- Elena Hammari, Norwegian University of Science and Technology, Norway
- Peter Harrod, ARM Ltd, UK
- Domenik Helms, OFFIS, Germany
- Richard Illman, Cadence, UK
- Michael Imhof, Institut fuer Technische Informatik Universitaet Stuttgart, Germany
- Michiko Inoue, Nara Institute of Science and Technology, Japan
- Gert Jervan, Tallinn University of Technology, Estonia
- Srinivas Katkoori, Department of Computer Science and Engineering, University of South Florida, Tampa
- Miyase Kohei, Kyushu Institute of Technology, Japan
- Rene Kothe, Brandenburg University of Technology Cottbus, Germany
- Sandip Kundu, University of Massachusetts, USA
- Wieslaw Kuzmicz, University of Warsaw
- Enrico Macii, Politecnico di Torino, Italy
- Grzegorz Mrugalski, Mentor Graphics Corp.
- Philipp Nenninger, ABB Corporate Research Centre, Germany
- Nicola Nicolici, McMaster University, Canada
- Michael O’Sullivan, Cadence, UK
- Satoshi Ohtake, Nara Institute of Science and Technology, Japan
- Ilia Polian, Univ. of Passau, Germany
- Irith Pomeranz, Purdue University, USA
- Janusz Rajski, Mentor Graphics Corporation, Poland
- Sudhakar Reddy, University of Iowa, USA
- Teresa Riesgo, Polytechnic University of Madrid, Spain
- Juan José Rodríguez-Andina, University of Vigo, Spain
- William Ruby, Sequence Design, Inc.
- Gordon Russell, Newcastle University, UK
- Sudip Roy, Department of Computer Science & Engineering, Indian Institute of Technology Kharagpur, India
- Scott Roy, University of Glasgow, UK
- Kewal Saluja, University of Wisconsin - Madison, USA
- Michihiro Shintani, Semiconductor Technology Academic Research Center, Japan
- Joao Paulo Teixeira, IST / TUL INESC-ID, Portugal
- Daniel Tille, University of Bremen, Germany
- Aida Todri, LIRMM / Univ. Montpellier
- Fabian Vargas, PUCRS, Brasil
- Xiaoqing Wen, Kyushu Institute of Technology, Japan
- T.W. Williams, Synopsys Inc., USA
- Mark Zwolinski, University of Southampton, UK
(Please let me know of any inaccuracies in this page A.Bystrov)
Revision: 1st May 2012