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Department of Computing Science

University of Newcastle upon Tyne

"Behavioural REfinements for Asynchronous Circuit syntHesis" (BREACH)

funded by EPSRC (GR/M94359) 5.7K pounds.

GRANT REVIEW RESULT (06.03.2002) - Overall assessment: Tending to Outstanding
In particular

Final report (pdf)

This is a Visiting Fellowship for Dr. Nikolai Starodoubtsev, from Russian Academy of Science Institute of Analytical Instrumentation (St. Petersburg).

Two major objectives which would complement the achievements of the ASAP and ASTI projects (GR/J52327 and GR/L24038) and create a good background for its follow-up:



N. Starodoubtsev, S. Bystrov, M. Goncharov, I. Klotchkov and A. Smirnov. Towards Synthesis of Monotonic Asynchronous Circuits from Signal Transition Graphs. Proceedings of the Second International Conference on Application of Concurrency to System Design (ACSD 2001) 27-29 June 2001, Newcastle upon Tyne, IEEE Comp. Society, 2001, pp. 179-188.

A. Smirnov, M. Goncharov, I. Klotchkov, and N. Starodoubtsev. A Technique to Automate STG Analysis and Refinement for CSC and Normalcy, Handouts of the First ACiD-WG Workshop (Framework 5), Neuchatel, Switzwerland, 12-13 February, 2001.

N. Starodoubtsev and A. Yakovlev. Isochronic Fork-Free Asynchronous Circuits, 9th Asynchornous UK Forum, Cambridge, Dec. 2000.

N. Starodoubtsev, A. Bystrov, and A. Yakovlev Semi-modular latch chains for asynchronous circuit design. Proc. 10th Int. Workshop on Power and Timing Modelling, Optimization and Simulation (PATMOS'2000), Goetingen, Germany, Sept. 2000, D. Soudris, P. Pirsch, E. Barke (Eds), LNCS 1918, Springer, pp. 168-177.

N. Starodoubtsev, M. Goncharov, I. Klotchkov and A. Smirnov. Synthesis of asynchronous interface circuits by STG refinement. In: A. Yakovlev and R. Nouta (Eds.) Proceedings of Int. Workshop on Asynchronous Interfaces: Tools, techniques, and Implementations (AINT'2000), TU Delft, The Netherlands, July 2000, ISBN 90-5326-037-4, pp. 65-74.

A.B. Smirnov, N. Starodoubtsev, I.V. Klotchkov and M. Goncharov, A technique to automate STG analysis and refinement for CSC and normalcy, Proc. Power and Timing Modeling, Optimization and Simulation (PATMOS), Yverdon-Les-Bains, Switzerland ,September 2001.

Further details about the project may be obtained from Alex Yakovlev, Dept. of Computing Science, University of Newcastle upon Tyne, NE1 7RU, tel. +44-191-2228184, email: